1. Field of the Invention
Apparatuses and methods consistent with the present invention relate to an inductor with plural coil layers.
2. Description of the Related Art
In general, an integrated inductor is an indispensable passive element for impedance matching in an integrated circuit, and occupies the largest area in the integrated circuit. However, since impedance is a function of a frequency, the inductor should proportionally increase in size as the frequency decreases, so as to obtain the same impedance. Accordingly, there is a drawback in that the integrated circuit increases in size, thereby increasing a unit cost of products. Therefore, various attempts have been made for development of an integrated inductor having a size as small as possible while having a high inductance and quality factor (Q).
U.S. Pat. No. 6,593,201 discloses an integrated circuit having a conventional integrated inductor arranged. A first inductor and a second inductor are vertically arranged within an insulating metal layer supported by a substrate. The disclosed integrated circuit advantageously decreases in area and at the same time, increases in inductance as much as a mutual inductance by magnetic coupling. However, the disclosed integrated circuit has a drawback in that the inductor underlain on a characteristic of a complementary metal oxide semiconductor (CMOS) process gets worse characteristically, thereby deteriorating a quality factor. Further, U.S. Pat. No. 6,593,201 has a drawback in that, Cited Reference 1 only considers a structure where a single signal is applied, however the inductor is double in size in a circuit where a differential signal is applied.
U.S. Pat. No. 6,549,077 discloses another conventional integrated inductor. A drain inductor is connected to a drain of a transistor, a gate inductor is connected a gate of the transistor and applies a radio frequency (RF) input signal, and a source inductor is connected to a source of the transistor and allows a current flow in the same direction. Accordingly, disclosed integrated inductor has an advantage in that a magnetic flux generated by each inductor is magnetically coupled in the same direction, thereby increasing the inductance of the integrated circuit, and at the same time, decreasing the integrated circuit in area.
However, U.S. Pat. No. 6,549,077 has a drawback in that the transistor is disposed outside of a loop, having a square shape, of the inductors, thereby lengthening a lead line and increasing a parasitic component. Further, like U.S. Pat. No. 6,593,201, U.S. Pat. No. 6,549,077 considers only a structure where a single signal is applied, and therefore has a drawback in that the inductor is double in size in a circuit where a differential signal is applied.